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NV Electronically Programmable Capacitor
FEATURES * Non-volatile EEPROM storage of programmed trim codes * Power On Recall of capacitance setting * MSOP Package (1.1 mm x 3.0 mm x 3.0 mm) * High-Performance Electronically Trimmable Capacitance * Excellent Linearity: <0.5 LSB error * Very Simple Digital Interface * Fast Adjustments: 5s max incremental change * Eliminates the need for mechanical tuning * Capacitance trimmable from 7.5 pF to 14.5 pF (single-ended mode) APPLICATIONS * * * * * * * * Post-trim of low-cost regenerative receivers Tunable RF stages Low-cost, Low temperature drift oscillators Garage door openers Keyless entry Industrial wireless control Capacitive sensor trimming RFID tags DESCRIPTION
X90100
The Xicor X90100 is a non-volatile electronically programmable capacitor. The device is programmed through a simple digital interface. After programming, the chosen setting for the device is retained by internal EEPROM storage whether or not DC power is maintained. There are 32 programmable capacitance values selectable, ranging from 7.5 pF to 14.5 pF in 0.23 pF increments, in single-ended mode. The dielectric is highly stable, and the capacitance exhibits a very low voltage coefficient. The X90100 is programmed through three digital interface pins, which have Schmitt triggers and pullup resistors to secure code retention. The three pins, INC, U/D, and CS, are identical in operation to other Xicor chips with up/down interface, such as the x9315 5-bit Digitally Controlled Potentiometer (DCP).
BLOCK DIAGRAM
Cp 1*CU 2*CU 4*CU 8*CU 16*CU U/D INC Logic and E2 CS
Cm
CPAD
CPAD
VSS
VCC
Power On Reset
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X90100
PIN CONFIGURATION
MSOP INC U/D Vss Cp 1 2 3 4 X90100 8 7 6 5 VCC CS N/C Cm
X90100
X
X
X VCC Limits Blank =2.7V to 5.5V Temperature Range I = Industrial = -40C to +85C Package M = 8-Lead MSOP Base Part Number
X90100 ORDERING CODES Ordering Number
X90100M8I
Ctotal
7.5pF to 14.5pF, Single Ended
Package
8-lead MSOP
Temperature Range
-40C to +85C
PIN DESCRIPTIONS MSOP
1
Symbol
INC
Brief Description
Increment (INC). The INC input is negative-edge triggered. Toggling INC will move the capacitance value and either increment or decrement the counter in the direction indicated by the logic level on the U/D input. Up/Down (U/D). The U/D input controls the direction of the trimmed capacitor value and whether the counter is incremented or decremented. Ground. Cp. The high (Cp) and low (Cm) terminals of the X90100 are equivalent to the fixed terminals of a mechanical trimmable capacitor. The minimum dc voltage is VSS and the maximum is VCC. The value of capacitance across the terminals is determined by digital inputs INC, U/D, and CS. Cm. The high (Cp) and low (Cm) terminals of the X90100 are equivalent to the fixed terminals of a mechanical trimmable capacitor. The minimum dc voltage is VSS and the maximum is VCC. The value of capacitance across the terminals is determined by digital inputs INC, U/D, and CS. Not Connected. Must be floating. Chip Select (CS). The device is selected when the CS input is LOW. The current counter value is stored in nonvolatile memory when CS is returned HIGH while the INC input is also HIGH. After the store operation is complete the X90100 will be placed in the low power standby mode until the device is selected once again. Positive Supply Voltage.
2 3 4
U/D VSS Cp
5
Cm
6 7
N/C CS
8
VCC
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ABSOLUTE MAXIMUM RATINGS Temperature under bias ....................-65C to +135C Storage temperature .........................-65C to +150C Voltage on CS, INC, U/D, CP, and CM with respect to VSS ........................... -1V to +7V V = |VCP-VCM| ..................................................... 5V Lead temperature (soldering 10 seconds)..........300C COMMENT Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only; the functional operation of the device (at these or any other conditions above those listed in the operational sections of this specification) is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
CAPACITOR CHARACTERISTICS (Vcc=+5V, TA=25C, single ended mode, CM = 0V, unless otherwise stated.) Limits Symbol
VCp VCm C C CTOTAL CTOTAL Q INL DNL VCC
Parameter
Absolute accuracy Cp terminal voltage Cm terminal voltage Capacitance increments Capacitance range Capacitance at Code=0 Capacitance at Code=31 Quality factor(5) Resolution Absolute linearity error Relative linearity error Supply Voltage
(1) (2)
Min.
0 0
Typ(4).
15
Max.
VCC VCC
Unit
% V V pF pF pF pF
Test Conditions/Notes
0.23 7 7.5 14.5 7 5 0.15 0.15 2.7 5.5
f=315 MHz bits lsb lsb V
Notes: (1) (2) (3) (4) (5)
Absolute linearity is used to determine actual capacitance versus expected capacitance = C (n)(actual) -- C(n) (expected) = 0.15 Ml. Relative linearity is a measure of the error in step size between settings = C(n+1)--[C(n) + Ml] = 0.15 Ml. lsb = least significant bit = CTOT/31. Typical values are for TA = 25C and nominal supply voltage. This parameter is not 100% tested
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X90100
D.C. OPERATING CHARACTERISTICS (VCC = 5V, TA = 25C unless otherwise specified) Limits Symbol
ICC1 ICC2 ISB ILI VIH VIL CIN(5)
Parameter
VCC active current (Increment) VCC active current (Store) (EEPROM Store) Standby supply current CS, INC, U/D input leakage current CS, INC, U/D input HIGH voltage CS, INC, U/D input LOW voltage CS, INC, U/D input capacitance
Min.
Typ.(4)
50 250 0.5 -15
Max.
100 500 2
Unit
A A A A
Test Conditions
CS = VIL, U/D = VIL or VIH and INC = 0.4V @ max. tCYC CS = VIH, U/D = VIL or VIH and INC = VIH @ max. tWR CS = VCC - 0.3V, U/D and INC = VSS or VCC - 0.3V VIN = VSS
VCC x 0.7 -0.5
VCC + 0.5 VCC x 0.1 10
V V pF VCC = 5V, VIN = VSS, TA = 25C, f = 1MHz
ENDURANCE AND DATA RETENTION (VCC = 5V, TA = 25C unless otherwise specified) Parameter
Minimum endurance Data retention
Min.
100,000 100
Unit
Data changes per bit Years
A.C. CONDITIONS OF TEST
Input pulse levels Input rise and fall times Input reference levels 0V to 3V 10ns 1.5V
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X90100
A.C. OPERATING CHARACTERISTICS (VCC = 5V, TA = 25C unless otherwise specified) Symbol
tCl tlD tDI tlL(7) tlH(7) tlC tCPHNS(5) tCPHS(5) tIW tCYC tR, tF(5) tPU(5) tR VCC(5) tWR(5)
Parameter
CS to INC setup INC HIGH to U/D change U/D to INC setup INC LOW period INC HIGH period INC Inactive to CS inactive CS Deselect time (NO STORE) CS Deselect time (STORE) INC to CTOTAL change INC cycle time INC input rise and fall time Power up to capacitance stable VCC power-up rate Store cycle
Min.
100 100 100 1 1 1 1 10
Limits Typ.(4)
Max.
Unit
ns ns ns s s s s ms s s s s V/ms ms
1 4
5 500 5 50 10
0.2 5
A.C. TIMING
CS tCYC tCI INC tID tDI tF tIL tIH tIC (Store) tCPHS 90% 90% 10% tR
tCPHNS
U/D tIW CTOTAL MI (6)
Notes: (6) MI in the A.C. timing diagram refers to the minimum incremental change in the CTOTAL output due to a change in the counter value. (7) tIH + tIL 4s
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POWER UP TIMING (DIGITAL INPUTS FLOATING, INTERNAL PULLUP ACTION SHOWN)
VCC = 3.3 or 5.0V tRVCC VCC
CS
INC
U/D
POWER UP AND DOWN REQUIREMENTS There are no restrictions on the power-up or power-down conditions of VCC and the voltages applied to the Cp, Cm pins provided that VCC is always more positive than or equal to VCp, VCm, i.e., VCC VCp, VCm. The VCC ramp rate spec is always in effect. Powerup Requirements In order to prevent unwanted tap position changes or an inadvertant store, bring the CS and INC high before or concurrently with the VCC pin. The logic inputs have internal active pullups to provide reliable powerup operation. See powerup timing diagram.
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X90100
PIN CONFIGURATION
MSOP INC U/D Vss Cp 1 2 3 4 X90100 8 7 6 5 VCC CS N/C (leave floating) Cm
DETAILED PIN DESCRIPTIONS Cp and Cm The high (Cp) and low (Cm) terminals of the X90100 are equivalent to the fixed terminals of a mechanical trimmable capacitor. The minimum dc voltage is VSS and the maximum is VCC. The value of capacitance across the terminals is determined by digital inputs INC, U/D, and CS. Up/Down (U/D) The U/D input controls the direction of the trimmed capacitor value and whether the counter is incremented or decremented. This pin has an active current source pullup. Increment (INC) The INC input is negative-edge triggered. Toggling INC will move the capacitance value and either increment or decrement the counter in the direction indicated by the logic level on the U/D input. This pin has an active current source pullup. Chip Select (CS) The device is selected when the CS input is LOW. The current counter value is stored in nonvolatile memory when CS is returned HIGH while the INC input is also HIGH. After the store operation is complete the X90100 will be placed in the low power standby mode until the device is selected once again. This pin has active circuit source pullup. N/C - This pin should be left floating.
PIN NAMES Symbol
Cp Cm VSS VCC U/D INC CS
Default
output output supply supply pull up pull up pull up
Description
Positive capacitor terminal Negative capacitor terminal Ground Positive supply voltage Up/Down control input Increment control input Chip Select control input
PRINCIPLES OF OPERATION There are three sections of the X90100: the input control, counter and decode section; the nonvolatile memory; and the capacitor array. The input control section operates just like an up/down counter. The output of this counter is decoded to turn on electronic switches connecting internal units to the sum capacitor. Under the proper conditions the contents of the counter can be stored in nonvolatile memory and retained for future use. The capacitor array is comprised of 31 individual capacitors connected in parallel. At one end of each element is an electronic switch that connects it to the sum. The capacitor, when at either end of the range, acts like its mechanical equivalent and does not move beyond the last position. That is, the counter does not wrap around when clocked to either extreme. The electronic switches on the device operate in a "make before break" mode when the counter changes positions. If the counter is moved several positions, multiple units are connected to the total for tIW (INC to CTOTAL change). The CTOTAL value for the device can temporarily be increased by a significant amount if the counter is moved several positions.
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X90100
When the device is powered-down, the last counter position stored will be maintained in the nonvolatile memory. When power is restored, the contents of the memory are recalled and the capacitor is set to the value last stored. INSTRUCTIONS AND PROGRAMMING The INC, U/D and CS inputs control the movement of the capacitor total value. With CS set LOW the device is selected and enabled to respond to the U/D and INC inputs. HIGH to LOW transitions on INC will increment or decrement (depending on the state of the U/D input) a five bit counter. The output of this counter is decoded to select one of thirty two capacitor combinations for the capacitor array. The value of the counter is stored in nonvolatile memory whenever CS transitions HIGH while the INC input is also HIGH. The system may select the X90100, move the capacitor value and deselect the device without having to store the latest count total in nonvolatile memory. After the count movement is performed as described above and once the new position is reached, the system must keep INC LOW while taking CS HIGH. The new CTOTAL value will be maintained until changed by the system or until a power-up/down cycle recalled the previously stored data. This procedure allows the system to always power-up to a preset value stored in nonvolatile memory; then during system operation minor adjustments can be made. The adjustments might be based on user preference, system parameter changes due to temperature drift, etc. The state of U/D may be changed while CS remains LOW. This allows the host system to enable the device and then move the counter up and down until the proper trim is attained. MODE SELECTION
CS INC U/D
Mode
Cap value Up Cap value Down Store Cap Position Standby Current No Store, Return to Standby Cap value Up (not recommended) Cap value Down (not recommended)
L L H H X L L L
H L X X X H L
TABLE OF VALUES
Single-Ended Mode COUT = Code * 7.0 + 7.5 (pF) 31 0 Code 31
Differential Mode COUT = Code * 0.35 + 1.00 (pF) 0 Code 31
Cp X90100 Cm
X1 Oscillator Circuit X2
Cm Cp Cp Cs X90100 Oscillator Circuit
Example of a single-ended circuit
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Example of a differential mode circuit
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X90100
PACKAGING INFORMATION
8-Lead Miniature Small Outline Gull Wing Package Type M
0.118 0.002 (3.00 0.05) 0.012 + 0.006 / -0.002 (0.30 + 0.15 / -0.05) 0.0256 (0.65) Typ.
R 0.014 (0.36) 0.118 0.002 (3.00 0.05)
0.030 (0.76) 0.0216 (0.55)
0.036 (0.91) 0.032 (0.81)
7 Typ.
0.0256" Typical 0.040 0.002 (1.02 0.05) 0.008 (0.20) 0.004 (0.10)
0.025" Typical 0.220"
0.007 (0.18) 0.005 (0.13)
0.150 (3.81) Ref. 0.193 (4.90) Ref.
FOOTPRINT
0.020" Typical 8 Places
NOTE: 1. ALL DIMENSIONS IN INCHES AND (MILLIMETERS)
LIMITED WARRANTY
(c)Xicor, Inc. 2003 Patents Pending
Devices sold by Xicor, Inc. are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. Xicor, Inc. makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. Xicor, Inc. makes no warranty of merchantability or fitness for any purpose. Xicor, Inc. reserves the right to discontinue production and change specifications and prices at any time and without notice. Xicor, Inc. assumes no responsibility for the use of any circuitry other than circuitry embodied in a Xicor, Inc. product. No other circuits, patents, or licenses are implied. TRADEMARK DISCLAIMER: Xicor and the Xicor logo are registered trademarks of Xicor, Inc. AutoStore, Direct Write, Block Lock, SerialFlash, MPS, BiasLock and XDCP are also trademarks of Xicor, Inc. All others belong to their respective owners. U.S. PATENTS Xicor products are covered by one or more of the following U.S. Patents: 4,326,134; 4,393,481; 4,404,475; 4,450,402; 4,486,769; 4,488,060; 4,520,461; 4,533,846; 4,599,706; 4,617,652; 4,668,932; 4,752,912; 4,829,482; 4,874,967; 4,883,976; 4,980,859; 5,012,132; 5,003,197; 5,023,694; 5,084,667; 5,153,880; 5,153,691; 5,161,137; 5,219,774; 5,270,927; 5,324,676; 5,434,396; 5,544,103; 5,587,573; 5,835,409; 5,977,585. Foreign patents and additional patents pending. LIFE RELATED POLICY In situations where semiconductor component failure may endanger life, system designers using this product should design the system with appropriate error detection and correction, redundancy and back-up features to prevent such an occurrence. Xicor's products are not authorized for use in critical components in life support devices or systems. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
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Characteristics subject to change without notice.
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